Number Systems and Base Conversion
, r-1. Digital hardware uses radix 2 because two voltage levels are reliable; humans prefer radix 10; programmers also use radix 8 (octal) and radix 16 (hexadecimal) as compact notations for binary bit patterns.
DL · Short notes
Digital Logic short notes
17 short notes in syllabus order, about 142 minutes to read end to end.
Number systems and representation
Signed Number Representation
Unsigned binary encodes only non-negative integers. Processors also need negative values. Three classical encodings place a sign into a fixed-width bit pattern: sign-magnitude, ones' complement, and two's complement.
Binary Codes: BCD, Gray and Excess-3
A binary code assigns a bit pattern to each symbol of a set (decimal digits, angles of a shaft encoder, and so on). Pure binary is efficient for arithmetic, but other codes are built for decimal I/O, for single-bit-change sequencing, or for self-complementing digit arithmetic.
Boolean algebra
Boolean Algebra
Boolean algebra is the algebra of two-valued logic used to describe and simplify digital circuits. Variables take values in 0,1; the operations AND, OR and NOT correspond to series switches, parallel switches and inversion.
Canonical Forms and Functional Completeness
Every Boolean function has two canonical representations that are unique up to term order: the sum of minterms (canonical SOP) and the product of maxterms (canonical POS).
Minimization: algebraic, K-map and tabular method
Algebraic Minimization
Algebraic minimization rewrites a Boolean expression using identities until literal count, term count, or gate count drops, without changing the truth table. It is the syllabus's first minimization technique: no map drawing, no tabular covering.
Karnaugh Maps
A Karnaugh map (K-map) is a truth-table layout in which adjacent cells differ by one variable, so that combining minterms becomes circling power-of-two blocks of 1s. It is the standard hand method for minimizing Boolean functions of up to four variables (sometimes five or six with care).
Tabular (Quine-McCluskey) Method
The Quine-McCluskey (QM) method finds all prime implicants of a Boolean function by systematically combining minterms, then selects a minimum cover with a prime-implicant chart.
Combinational circuits
Combinational Circuit Design
A combinational circuit computes outputs from current inputs only: no memory, no clocks. Design means turning a worded specification into a gate network (or a chip-level connection of MSI blocks) whose truth table matches the specification.
Adders and Subtractors
Adders are the core combinational blocks of arithmetic. A half adder adds two bits; a full adder adds three bits (two operands and a carry-in). Chaining full adders yields a ripple-carry adder (RCA); carry-lookahead (CLA) computes the carries in parallel to cut the delay.
Multiplexers, Decoders and Encoders
Multiplexers (MUX), decoders and encoders are standard MSI combinational blocks. A MUX selects one of many data inputs using select lines. A decoder activates exactly one of 2^n outputs from an n-bit code, so its outputs are the minterms of its inputs.
Sequential circuits: flip-flops, counters and state machines
Latches and Flip-Flops
Latches and flip-flops are bistable memory elements. A latch is level-sensitive: while the enable is asserted it follows the input. A flip-flop is edge-triggered: it samples on a clock edge.
Registers and Counters
A register is a bank of flip-flops sharing a clock, often with load, clear and shift controls. A counter is a register whose state sequence follows a counted order.
Sequential Circuit Design and Finite State Machines
A synchronous sequential circuit combines combinational logic with edge-triggered flip-flops sharing a common clock. Its behaviour is a finite state machine (FSM): present state and inputs determine outputs and next state.
Fixed-point and floating-point arithmetic
Fixed-Point Arithmetic and Overflow
Fixed-point representation places an implied binary point at a fixed position in a word: integer formats put it after the LSB, fractional formats before the MSB of the fraction field. Arithmetic uses the same adders as integer two's complement, with overflow and scaling rules.
Floating-Point Representation (IEEE 754)
IEEE 754 binary floating-point encodes real numbers with a sign bit, a biased exponent field and a fractional significand. It is the representation GATE means by "floating point" under Digital Logic, and the one C float/double use on essentially all hosts.
Floating-Point Arithmetic
Floating-point addition and multiplication operate on IEEE encodings by aligning exponents, combining significands, normalizing, and rounding. Hardware implementations (add pipelines, fused multiply-add) belong more to Computer Organization; this note stays with the arithmetic rules.