Digital Logic · topic
Two's complement addition and subtraction with carry, overflow and flag rules, shifts and fixed-point (Q) formats, shift-and-add and Booth multiplication, restoring and non-restoring division, and IEEE 754 single and double: fields, bias, normal and subnormal values, zero, infinity, NaN, range, precision, encoding, addition and rounding.
Fixed-point representation places an implied binary point at a fixed position in a word: integer formats put it after the LSB, fractional formats before the MSB of the fraction field. Arithmetic uses the same adders as integer two's complement, with overflow and scaling rules.
IEEE 754 binary floating-point encodes real numbers with a sign bit, a biased exponent field and a fractional significand. It is the representation GATE means by "floating point" under Digital Logic, and the one C float/double use on essentially all hosts.
Floating-point addition and multiplication operate on IEEE encodings by aligning exponents, combining significands, normalizing, and rounding. Hardware implementations (add pipelines, fused multiply-add) belong more to Computer Organization; this note stays with the arithmetic rules.
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