Digital Logic · topic
Half and full adders and subtractors, ripple-carry and carry-lookahead delay with generate and propagate, adder-subtractor, comparators, multiplexers and implementing functions with them, mux and decoder trees, decoders, encoders and priority encoders, static hazards, and ROM sizing.
A combinational circuit computes outputs from current inputs only: no memory, no clocks. Design means turning a worded specification into a gate network (or a chip-level connection of MSI blocks) whose truth table matches the specification.
Adders are the core combinational blocks of arithmetic. A half adder adds two bits; a full adder adds three bits (two operands and a carry-in). Chaining full adders yields a ripple-carry adder (RCA); carry-lookahead (CLA) computes the carries in parallel to cut the delay.
Multiplexers (MUX), decoders and encoders are standard MSI combinational blocks. A MUX selects one of many data inputs using select lines. A decoder activates exactly one of 2^n outputs from an n-bit code, so its outputs are the minterms of its inputs.
One-page visual sheets for this topic, in the sheet library on the store. Previews are free; the full sheets come with the subject pack.
