Circuit, Packet and Virtual-Circuit Switching

A network is a mesh of links and switches, and switching is the way data from one link is moved onto the next on its way to the destination. There are two fundamentally different answers. Circuit switching reserves a path and a fixed share of every link on it before any data flows, as the telephone network did. Packet switching reserves nothing: data is cut into packets, each packet is stored at every switch and forwarded when the next link is free.

Packet switching itself comes in two forms. In a datagram network (the Internet's IP layer) every packet carries the full destination address and is forwarded independently. In a virtual-circuit network a connection is set up first, the switches on the path keep state for it, and packets carry only a short circuit label.

The choice decides the delay formula, the use of capacity, the amount of state in switches, and what happens when a switch fails. The calculations are delay formulas (circuit set-up, message switching, packet pipelining, optimal packet size); the rest is comparison statements.

A circuit goes through three phases: set-up (signalling reserves a channel on every link of the path), data transfer, and teardown. On each link the reserved share is either a frequency band (FDM) or a time slot in every frame (TDM). With TDM, a link of rate $R$ divided into $n$ slots gives each circuit a rate $R/n$.

Properties: guaranteed constant rate and delay once set up; no per-packet header; bits flow through switches without being stored; capacity reserved for a circuit is wasted while that circuit is silent; set-up time is paid before the first bit moves.

The whole message is received at each switch, stored, then sent on. No reservation, no splitting. A long message occupies each link for its full transmission time, and the next link cannot start until the last bit has arrived. It is mainly a reference point for showing why packets are better.

The message is cut into packets of bounded size, each with a header. Every switch performs store-and-forward: it must receive the whole packet (to check it and read its header) before it starts sending it on. Because packets are small, different packets are on different links at the same moment, which is pipelining. Links are shared on demand (statistical multiplexing); when packets arrive faster than a link can send them, they wait in a queue, and a full buffer means loss.

Label swapping. A VC identifier has meaning only on one link. Each switch has a table mapping (incoming interface, incoming VC number) to (outgoing interface, outgoing VC number) and rewrites the label as it forwards. This keeps labels short and lets each switch choose free numbers on its own links.

A packet arriving on interface 1 with label 12 leaves on interface 3 with label 22.

Virtual circuit is different from circuit switching. A virtual circuit fixes the path but reserves nothing by default: packets are still stored and forwarded and still queue. Circuit switching reserves capacity, so there is no queueing inside the network.

Take three links in series (host A, routers R1 and R2, host B), each of rate $R$, with propagation delay ignored. The message is 3 packets of the same size, each needing 1 ms to transmit.

Notation: $N$ links in series (so $N - 1$ intermediate switches), each of rate $R$ bit/s and propagation delay $t_p$; a message of $M$ bits; packets of $L$ bits each (header included), $P$ packets in all. Processing and queueing are taken as zero unless a question says otherwise.

Circuit switching. After set-up time $t_s$, the message is pushed once at the circuit rate $R_c$ (for example $R/n$ for an $n$-slot TDM link) and the bits propagate across all links:

Message switching. Each of the $N$ links carries the full message after the previous link has finished:

Packet switching (store-and-forward, pipelined). The first packet needs $N$ transmission times to reach the destination; each later packet arrives one transmission time after the one before it:

Proof sketch: with equal link rates, packet $i$ (counting from 1) finishes on link $j$ at time $(i + j - 1) L/R$ plus propagation, because link $j$ is busy with packet $i - 1$ until $(i + j - 2)L/R$ and receives packet $i$ from link $j - 1$ at the same moment. Set $i = P$ and $j = N$.

Optimal packet size. The expression below assumes every packet, including the last, is padded to $p$ payload bits, so every packet has $p+h$ bits. An unpadded last packet requires its actual length and packet-by-packet timing. Restrict payload to the allowed integer range, normally $1\le p\le M$. If a message of $M$ payload bits is cut into packets carrying $p$ payload bits plus an $h$-bit header, then $P = \lceil M/p \rceil$ and

Small packets pipeline well but pay many headers; large packets pay few headers but pipeline badly. Ignoring the ceiling and differentiating $(M/p + N - 1)(p + h)$ gives an interior stationary minimum for $N>1$, $h>0$ at

For this padded model, $p^*$ is a candidate/guide, not a substitute for the feasible integer search: evaluate allowed payloads (or packet-count breakpoints) and boundaries; if $p^*$ exceeds the maximum, test that boundary. If $p^*$ is feasible and $M/p^*$ is an integer, it attains the continuous lower bound. For $N=1$, use one packet; for $h=0$, there is no positive interior stationary minimum. An unpadded last packet requires its actual length in a packet-by-packet calculation.

Statistical multiplexing. If $n$ users each are active independently with probability $q$, the number active is binomial, and the chance that more than $c$ are active at once is $\sum_{j=c+1}^{n} \binom{n}{j} q^j (1-q)^{n-j}$.

A file of 1,000,000 bits is sent over a circuit on links of 2.048 Mbps, each divided by TDM into 32 slots; set-up takes 250 ms; propagation is ignored. Circuit rate $2.048 \times 10^6 / 32 = 64{,}000$ bit/s. Transfer time $10^6 / 64{,}000 = 15.625$ s. Total $0.25 + 15.625 = 15.875$ s. The answer does not depend on the number of links, because the bits are not stored at switches.

A 1,200,000-bit message crosses 3 links of 1 Mbps, propagation ignored. Message switching: $3 \times 1.2 = 3.6$ s. Packet switching with 1000 packets of 1200 bits (headers ignored): $(3 + 1000 - 1) \times 1.2$ ms $= 1.2024$ s. Pipelining makes the total close to one transmission of the message plus two packet times.

A 30,000-bit payload crosses $N = 4$ links of 1 Mbps; every packet has a 100-bit header; propagation ignored. Then $p^{*} = \sqrt{30{,}000 \times 100 / 3} = 1000$ bits, giving 30 packets of 1100 bits and $T = 33 \times 1.1 = 36.3$ ms.

Because $p^{*} = 1000$ divides 30,000 exactly, the formula's optimum is also the best integer packet size.

A 1 Mbps link; each user sends at 100 kbps while active and is active 10% of the time, independently. Circuit switching can admit 10 users. With packet switching and 40 users, the probability that more than 10 are active at once is about 0.0015, so 40 users share the link with rare overload.

Using the table in "Core concepts", a packet that enters on interface 3 with VC 7 leaves on interface 2 carrying VC 17. The next switch looks up (its incoming interface, 17), not 7.

Three 1000-bit packets cross two links, 1 Mbps then 0.5 Mbps (1 ms and 2 ms per packet), with propagation ignored. Packet 1 reaches the router at 1 ms and the destination at 3 ms. Packet 2 reaches the router at 2 ms but waits until the slow link is free at 3 ms, so it arrives at 5 ms; packet 3 arrives at 7 ms. With all packets ready at the source, the pipelined formula becomes

one packet's time across every link plus one slowest-link time for each further packet: $3 + 2 \times 2 = 7$ ms. The order of the links does not matter (slow link first also gives 7 ms), and with equal rates the formula reduces to $(N + P - 1)L/R$.

Common misconceptions.