GATE CS Mastery
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GATE CS 2026 Set 1 · Computer Organization and Architecture

Question 15

MCQ1 markWrong answer: −1/3Easy (estimate)

Question

Consider a processor P whose instruction set architecture is the load-store architecture. The instruction format is such that the first operand of any instruction is the destination operand.

Which one of the following sequences of instructions corresponds to the high-level language statement Z = X + Y ?

Note: X, Y, and Z are memory operands. R0, R1, and R2 are registers.

Choose one option
Official answer and solution
Official answer
D
From
Official GATE 2026 answer key

Solution

Apply the rule of a load-store (RISC) architecture: only LOAD and STORE instructions may access memory; arithmetic instructions must operate solely on registers.

In a load-store architecture, arithmetic instructions such as ADD cannot take memory operands (X, Y, or Z) directly. Instead:

  1. LOAD R0, X loads memory operand X into R0.
  2. LOAD R1, Y loads memory operand Y into R1.
  3. ADD R2, R0, R1 adds registers R0 and R1 and places the sum into destination register R2.
  4. STORE Z, R2 stores the result from R2 into memory location Z.
Final answer

Option (D)

The answer is the one in the official GATE answer key. The solution is this site's own explanation.

Source

Paper
GATE 2026 Computer Science and Information Technology - Session 1 (CS1)
Question
15 of 65
Section
Computer Science and Information Technology

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