Memory Hierarchy and Performance
No single memory technology is at once fast, large and cheap. Static RAM is fast but costly per bit, DRAM is slower but dense, and magnetic disks and flash are slower again but cheaper still.
Computer Organization & Architecture · topic
Memory hierarchy, interfacing and performance
Building a memory from smaller chips: chip counts, decoders, address maps, partial decoding, DRAM address multiplexing and interleaving. Then locality, hit ratio and average access time for hierarchical and simultaneous access, multilevel formulas and memory stall cycles.
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Memory Interfacing and Organization
Memory interfacing is the design of the connection between a processor and its main memory: how chips are combined into a memory of the required size and word width, how each address selects exactly one location, and how the memory is organised for speed.
Memory hierarchy, interfacing and performance cheat sheets
One-page visual sheets for this topic, in the sheet library on the store. Previews are free; the full sheets come with the subject pack.