GATE CS 2024 Set 2 Q.58: Instruction Pipelining and Hazards

A non-pipelined instruction execution unit operating at 2 GHz takes an average of 6 cycles to execute an instruction of a program P. The unit is then redesigned to operate on a 5-stage pipeline at 2 GHz. Assume that the ideal throughput of the pipelined unit is 1 instruction per cycle. In the execution of program P, 20% instructions incur an average of 2 cycles stall due to data hazards and 20% instructions incur an average of 3 cycles stall due to control hazards. The speedup (rounded off to one decimal place) obtained by the pipelined design over the non-pipelined design is _________

Your answer

Official answer and solution

Accepted answers: 2.9 to 3.1
From: Official GATE 2024 answer key

Solution

Compute $\text{CPI}_{\text{pipe}} = 1 + 0.2 \times 2 + 0.2 \times 3$ and divide $\text{CPI}_{\text{non-pipe}} = 6$ by $\text{CPI}_{\text{pipe}}$ (since both operate at 2 GHz).

Since both the non-pipelined and pipelined units operate at the same clock frequency ( $2\text{ GHz}$ ), the speedup is the ratio of their average cycles per instruction (CPI):

$\text{CPI}_{\text{non-pipe}} = 6$ .
$\text{CPI}_{\text{pipe}} = \text{CPI}_{\text{ideal}} + \text{Stalls}_{\text{data}} + \text{Stalls}_{\text{control}} = 1 + (0.20 \times 2) + (0.20 \times 3) = 1 + 0.4 + 0.6 = 2.0$ .
Speedup: $\text{Speedup} = \frac{\text{CPI}_{\text{non-pipe}}}{\text{CPI}_{\text{pipe}}} = \frac{6}{2.0} = 3$

Final answer

The answer is the one in the official GATE answer key. The solution is this site's own explanation.

Source

Paper: GATE 2024 Computer Science and Information Technology - Set 2 (CS2)
Question: 58 of 65
Section: Computer Science and Information Technology

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