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GATE CS 2024 Set 2 · Computer Organization and Architecture

Question 57

NAT2 marksNo negative markingEasy (estimate)

Question

A processor with 16 general purpose registers uses a 32-bit instruction format. The instruction format consists of an opcode field, an addressing mode field, two register operand fields, and a 16-bit scalar field. If 8 addressing modes are to be supported, the maximum number of unique opcodes possible for every addressing mode is _________

Official answer and solution
Official answer
32
From
Official GATE 2024 answer key

Solution

Subtract the bits required for the addressing mode, two register operands, and 16-bit scalar field from 32 bits to find the opcode bit-width.

  1. Addressing mode field: log⁡2(8)=3\log_2(8) = 3 bits.
  2. Two register operand fields: Each of the 1616 registers requires log⁡2(16)=4\log_2(16) = 4 bits, so 2×4=82 \times 4 = 8 bits.
  3. Scalar field: 1616 bits.
  4. Opcode field: 32−(3+8+16)=32−27=532 - (3 + 8 + 16) = 32 - 27 = 5 bits.

With 55 bits for the opcode field, the maximum number of unique opcodes is 25=322^5 = 32.

Final answer

32

The answer is the one in the official GATE answer key. The solution is this site's own explanation.

Source

Paper
GATE 2024 Computer Science and Information Technology - Set 2 (CS2)
Question
57 of 65
Section
Computer Science and Information Technology

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