GATE CS 2012 Q.55 (CS Q.55): Memory Hierarchy: Cache, Main Memory and Secondary Storage

Linked answer questions

Statement for Linked Answer Questions 54 and 55:

A computer has a 256 KByte, 4-way set associative, write back data cache with block size of 32 Bytes. The processor sends 32 bit addresses to the cache controller. Each cache tag directory entry contains, in addition to address tag, 2 valid bits, 1 modified bit and 1 replacement bit.

Shared with question 54.

The size of the cache tag directory is

160 Kbits

136 Kbits

40 Kbits

32 Kbits

Official answer and solution

Official answer: A
From: Official GATE 2012 answer key

Solution

Multiply total cache lines by the bit width of each cache tag directory entry.

Bit components in each tag directory entry:

Tag field = 16 bits (from Q54).
Valid bits = 2 bits.
Modified (dirty) bit = 1 bit.
Replacement bit = 1 bit.

\text{Bits per tag entry} = 16 + 2 + 1 + 1 = 20\text{ bits}

Total number of cache lines = $8192 = 2^{13}$ lines.
Total size of tag directory:

\text{Size} = 8192 \times 20\text{ bits} = 163840\text{ bits}

\text{In Kbits} = \frac{163840}{1024} = 160\text{ Kbits}

This matches option (A).

Final answer

The answer is the one in the official GATE answer key. The solution is this site's own explanation.

Source

Paper: GATE 2012 Computer Science and Information Technology (CS)
Question: 55 of 65, printed as CS Q.55
Section: Computer Science and Information Technology

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