Question
Consider a processor that has 16 general purpose registers and it uses 2-byte instruction format for all its instructions. Variable-sized opcodes are permitted. There are three different types of instructions; M-type, R-type, and C-type. Each M-type instruction has 2 register operands and a 6-bit immediate operand. Each R-type instruction has 3 register operands. Each C-type instruction has a register operand and a 6-bit offset value. If there are 2 unique M-type opcodes and 7 unique R-type opcodes, which one of the following options gives the maximum number of unique opcodes possible for C-type instructions?
Official answer and solution
- Official answer
- B
- From
- Official GATE 2026 answer key
Solution
Compute the bit encodings consumed by M-type and R-type instructions out of the total 16-bit instruction patterns and divide the remaining space by the operand bit-space of a C-type instruction.
With 16 registers, each register operand requires bits, and the total instruction length is bits:
- M-type: 2 registers ( bits) + 6-bit immediate operand bits. Each M-type opcode consumes bit patterns.
- R-type: 3 registers ( bits). Each R-type opcode consumes bit patterns.
- C-type: 1 register ( bits) + 6-bit offset operand bits. Each C-type opcode consumes bit patterns.
Total bit patterns used by 2 M-type and 7 R-type opcodes:
Remaining bit patterns out of :
Therefore, at most unique C-type opcodes can be supported.
Option (B)
The answer is the one in the official GATE answer key. The solution is this site's own explanation.
Source
- Paper
- GATE 2026 Computer Science and Information Technology - Session 2 (CS2)
- Question
- 44 of 65
- Section
- Computer Science and Information Technology
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