Question
Consider a 2-bit saturating up/down counter that performs the saturating up count when the input is 0, and the saturating down count when is 1. The Next State table of the counter is as shown. The counter is built as a synchronous sequential circuit using D flip-flops.
| Input | Current State | Current State | Next State | Next State |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 1 |
| 0 | 1 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 | 0 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 0 |
Which one of the following options corresponds to the expressions for the inputs of the D flip-flops, and ?
Official answer and solution
- Official answer
- B
- From
- Official GATE 2026 answer key
Solution
Use the characteristic equation of a D flip-flop and minimize and using 3-variable Karnaugh maps.
For a D flip-flop, the excitation inputs are simply and :
- For : The minterms where are :
- Pairing
- Pairing
- Pairing
- For : The minterms where are :
- Pairing
- Pairing
- Pairing
Option (B)
The answer is the one in the official GATE answer key. The solution is this site's own explanation.
Source
- Paper
- GATE 2026 Computer Science and Information Technology - Session 1 (CS1)
- Question
- 37 of 65
- Section
- Computer Science and Information Technology
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