GATE CS 2025 Set 1 Q.37: Machine Instructions and Addressing Modes

A processor has 64 general-purpose registers and 50 distinct instruction types. An instruction is encoded in 32-bits. What is the maximum number of bits that can be used to store the immediate operand for the given instruction?

ADD R1, #25             // R1 = R1 + 25

$16$

$20$

$22$

$24$

Official answer and solution

Official answer: B
From: Official GATE 2025 answer key

Solution

Subtract the minimum bits needed for the opcode and the single register field R1 from the 32-bit instruction length.

Opcode field: To encode $50$ distinct instruction types, we need $\lceil \log_2 50 \rceil = 6$ bits ( $2^5 = 32 < 50 \le 2^6 = 64$ ).
Register field (R1): To address $64$ general-purpose registers, we need $\log_2 64 = 6$ bits.
Immediate operand field (#25): Since the instruction ADD R1, #25 specifies only one register (R1, which serves as both source and destination) and one immediate operand, the maximum number of bits left for the immediate operand is:

32 - 6 - 6 = 20\text{ bits}

Final answer

Option (B)

Common trap

Subtracting two 6-bit register fields ( $32 - 6 - 12 = 14$ ) when the instruction encoding only specifies a single register R1.

The answer is the one in the official GATE answer key. The solution is this site's own explanation.

Source

Paper: GATE 2025 Computer Science and Information Technology - Session 1 (CS1)
Question: 37 of 65
Section: Computer Science and Information Technology

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