GATE CS Mastery
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GATE CS 2021 Set 2 · Computer Organization and Architecture

Question 30

NATPrinted as CS Q.201 markNo negative markingEasy (estimate)

Question

Consider a computer system with DMA support. The DMA module is transferring one 8-bit character in one CPU cycle from a device to memory through cycle stealing at regular intervals. Consider a 2 MHz processor. If 0.5% processor cycles are used for DMA, the data transfer rate of the device is ______ bits per second.

Official answer and solution
Official answer
80000
From
Official GATE 2021 answer key

Solution

Calculate the DMA transfer frequency from processor clock rate and percentage of stolen cycles, then multiply by bits transferred per cycle.

Given parameters:

  • Processor clock frequency = 2 MHz=2×106 cycles/second2\text{ MHz} = 2 \times 10^6\text{ cycles/second}
  • Processor cycles stolen by DMA = 0.5%=0.0050.5\% = 0.005
  • Data transferred per stolen cycle = one 8-bit character = 8 bits

Calculate the number of CPU cycles allocated to the DMA controller per second:

DMA cycles per second=2×106×0.005=10,000 cycles/second\text{DMA cycles per second} = 2 \times 10^6 \times 0.005 = 10,000\text{ cycles/second}

Since each cycle transfers 8 bits of data, the data transfer rate is:

Data transfer rate=10,000×8=80,000 bits per second\text{Data transfer rate} = 10,000 \times 8 = 80,000\text{ bits per second}
Final answer

80000

The answer is the one in the official GATE answer key. The solution is this site's own explanation.

Source

Paper
GATE 2021 Computer Science and Information Technology - Session 2 (CS2)
Question
30 of 65, printed as CS Q.20
Section
Computer Science and Information Technology

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