Question
The read access times and the hit ratios for different caches in a memory hierarchy are as given below.
| Cache | Read access time (in nanoseconds) | Hit ratio |
|---|---|---|
| I-cache | 2 | 0.8 |
| D-cache | 2 | 0.9 |
| L2-cache | 8 | 0.9 |
The read access time of main memory is 90 nanoseconds. Assume that the caches use the referred-word-first read policy and the write back policy. Assume that all the caches are direct mapped caches. Assume that the dirty bit is always 0 for all the blocks in the caches. In execution of a program, 60% of memory reads are for instruction fetch and 40% are for memory operand fetch. The average read access time in nanoseconds (up to 2 decimal places) is
Official answer and solution
- Official answer
- 4.72
- From
- Official GATE 2017 answer key
Solution
Compute the average read access time for instruction fetches and data fetches separately, then calculate the weighted average based on the given access percentages.
Given memory parameters:
- I-cache: access time ns, hit ratio miss rate
- D-cache: access time ns, hit ratio miss rate
- L2-cache: access time ns, hit ratio miss rate
- Main memory: access time ns
- Instruction fetch proportion
- Data operand fetch proportion
- L2 Miss Penalty: On a miss in L2 cache, main memory is accessed, taking ns.
The effective L2 access time on an L1 miss is: - Instruction Fetch Average Access Time ():
- Data Fetch Average Access Time ():
Compute the overall weighted average read access time:
Thus, the average read access time is 4.72 nanoseconds.
4.72
Averaging the hit ratios of I-cache and D-cache directly instead of evaluating instruction and data access paths separately.
The answer is the one in the official GATE answer key. The solution is this site's own explanation.
Source
- Paper
- GATE 2017 Computer Science and Information Technology (CS) Session 2
- Question
- 45 of 65, printed as CS Q.45
- Section
- Computer Science and Information Technology
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