Question
A cache memory unit with capacity of words and block size of words is to be designed. If it is designed as a direct mapped cache, the length of the TAG field is 10 bits. If the cache unit is now designed as a 16-way set-associative cache, the length of the TAG field is ______ bits.
Official answer and solution
- Official answer
- 14
- From
- Official GATE 2017 answer key
Solution
Relate cache capacity, line size, and associativity to the field widths of physical memory addresses.
Let be the number of bits in the physical address.
The cache has capacity words and block size words.
The number of word-offset bits within a block is .
- Direct Mapped Cache:
- The number of blocks (lines) is .
- In a direct mapped cache, each line forms its own set, so the number of sets is .
- The number of index bits is .
- The physical address is partitioned as:
- 16-way Set-Associative Cache:
- Associativity .
- The number of sets is:
- The number of set-index bits is:
- Because the physical address width and block size remain the same, decreasing the index field by 4 bits increases the TAG field by 4 bits:
14.0
The answer is the one in the official GATE answer key. The solution is this site's own explanation.
Source
- Paper
- GATE 2017 Computer Science and Information Technology (CS) Session 1
- Question
- 54 of 65, printed as CS Q.54
- Section
- Computer Science and Information Technology
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