GATE CS 2017 Set 1 Q.25 (CS Q.25): Memory Hierarchy: Cache, Main Memory and Secondary Storage

Consider a two-level cache hierarchy with L1 and L2 caches. An application incurs 1.4 memory accesses per instruction on average. For this application, the miss rate of L1 cache is 0.1; the L2 cache experiences, on average, 7 misses per 1000 instructions. The miss rate of L2 expressed correct to two decimal places is ______.

Your answer

Official answer and solution

Official answer: 0.05
From: Official GATE 2017 answer key

Solution

Relate the global L2 misses per instruction to the total memory accesses entering L2 to find the local L2 cache miss rate.

Let $I$ be the number of instructions. The application incurs 1.4 memory accesses per instruction on average, so total memory accesses to L1 cache is:

\text{Accesses}_{L1} = 1.4 \times I

The miss rate of L1 cache is $m_1 = 0.1$ . The number of misses from L1, which are forwarded as accesses to L2 cache, is:

\text{Accesses}_{L2} = \text{Accesses}_{L1} \times m_1 = (1.4 \times I) \times 0.1 = 0.14 \times I

For $I = 1000$ instructions:

\text{Accesses}_{L2} = 0.14 \times 1000 = 140 \text{ accesses}

We are given that L2 experiences 7 misses per 1000 instructions:

\text{Misses}_{L2} = 7

The local miss rate of L2 is the ratio of L2 misses to L2 accesses:

m_2 = \frac{\text{Misses}_{L2}}{\text{Accesses}_{L2}} = \frac{7}{140} = \frac{1}{20} = 0.05

Final answer

0.05

The answer is the one in the official GATE answer key. The solution is this site's own explanation.

Source

Paper: GATE 2017 Computer Science and Information Technology (CS) Session 1
Question: 25 of 65, printed as CS Q.25
Section: Computer Science and Information Technology

Report an error in this question

GATE questions are the work of the organising institutes. This site is independent and is not affiliated with them.

Question

Solution

Source