GATE CS 2015 Set 2 Q.58 (CS Q.48): Combinational Circuits

A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is twice that of an AND/OR gate. The propagation delay of an AND/OR gate is 1.2 microseconds. A 4-bit ripple-carry binary adder is implemented by using four full adders. The total propagation time of this 4-bit binary adder in microseconds is _____.

Your answer

Official answer and solution

Official answer: 19.2
From: Official GATE 2015 answer key

Solution

Calculate the total delay of the 4-bit ripple-carry adder based on cascaded full adder delay.

Gate propagation delays given:

AND / OR gate delay: $t = 1.2\ \mu\text{s}$
XOR gate delay: $2t = 2.4\ \mu\text{s}$

A full adder consists of two half adders and one OR gate:

The sum output is generated by two cascaded XOR gates: $2 \times 2.4\ \mu\text{s} = 4.8\ \mu\text{s}$ .
The delay of a single full adder module is $4.8\ \mu\text{s}$ .

For a 4-bit ripple-carry binary adder implemented by cascading 4 such full adders:

\text{Total propagation time} = 4 \times (\text{full adder delay}) = 4 \times 4.8\ \mu\text{s} = 19.2\ \mu\text{s}.

Final answer

19.2

Common trap

Calculating internal carry propagation overlaps when the question specifies standard cascaded modular block delay of $4 \times 4.8 = 19.2\ \mu\text{s}$ .

The answer is the one in the official GATE answer key. The solution is this site's own explanation.

Source

Paper: GATE 2015 Computer Science and Information Technology (CS) Session 2
Question: 58 of 65, printed as CS Q.48
Section: Computer Science and Information Technology

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