Question 55

Determine Flip-Flop Inputs from Circuit:
From the schematic diagram:

• Flip-flop 2 ($Q_2$):
  $$J_2 = \overline{Q_1},\quad K_2 = Q_0$$
• Flip-flop 1 ($Q_1$):
  $$J_1 = Q_2,\quad K_1 = \overline{Q_2}$$
  Notice that $J_1 = Q_2$ and $K_1 = \overline{Q_2}$ means $Q_1$ acts as a D flip-flop with input $D_1 = Q_2$, so $Q_1^+ = Q_2$.
• Flip-flop 0 ($Q_0$):
  $$J_0 = Q_1,\quad K_0 = \overline{Q_0}$$

JK Flip-Flop Characteristic Equation:

Clock-by-Clock Trace from Initial State $Q_2 Q_1 Q_0 = 000$:

• Clock Cycle 1 (State 000):

  • Inputs:
    $J_2 = \overline{0} = 1,\; K_2 = 0 \implies Q_2^+ = 1$.
    $J_1 = 0,\; K_1 = \overline{0} = 1 \implies Q_1^+ = 0$.
    $J_0 = 0,\; K_0 = \overline{0} = 1 \implies Q_0^+ = 0$.
  • Next state after cycle 1: 100.

• Clock Cycle 2 (State 100):

  • Inputs:
    $J_2 = \overline{0} = 1,\; K_2 = 0 \implies Q_2^+ = 1$.
    $J_1 = 1,\; K_1 = \overline{1} = 0 \implies Q_1^+ = 1$.
    $J_0 = 0,\; K_0 = \overline{0} = 1 \implies Q_0^+ = 0$.
  • Next state after cycle 2: 110.

• Clock Cycle 3 (State 110):

  • Inputs:
    $J_2 = \overline{1} = 0,\; K_2 = 0 \implies Q_2^+ = Q_2 = 1$ (no change).
    $J_1 = 1,\; K_1 = \overline{1} = 0 \implies Q_1^+ = 1$.
    $J_0 = 1,\; K_0 = \overline{0} = 1 \implies Q_0^+ = 1$ ($J=1, K=1$ toggles $0 \to 1$).
  • Next state after cycle 3: 111.

Thus, the state sequence for the next 3 clock cycles is 100, 110, 111 (option C).