Question
Let and be two 4-bit registers that store numbers in 2's complement form. For the operation , which one of the following values of and gives an arithmetic overflow?
Official answer and solution
- Official answer
- B
- From
- Official GATE 2022 answer key
Solution
Evaluate the 4-bit two's complement values and detect overflow when the sum of two numbers of the same sign produces a result of the opposite sign.
In 4-bit 2's complement representation, the range of representable integers is .
Let us evaluate each option:
- (A) , . Sum: . Since , no overflow occurs.
- (B) , . Sum: . Since , the true sum cannot be represented in 4 bits. In binary addition: . The result has sign bit 0 (representing ), indicating negative overflow.
- (C) , . Sum: , no overflow.
- (D) , . Sum: , no overflow.
Thus, only Option (B) results in arithmetic overflow.
Option (B)
Confusing the end carry out of the MSB with an arithmetic overflow condition.
The answer is the one in the official GATE answer key. The solution is this site's own explanation.
Source
- Paper
- GATE 2022 Computer Science and Information Technology (CS)
- Question
- 18 of 65
- Section
- Computer Science and Information Technology
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