GATE CS 2026 Set 2 Q.54: Memory Management and Virtual Memory

A system has a Translation Lookaside Buffer (TLB) that has a reach of 1 MB. TLB reach is defined as the total amount of physical memory that can be accessed through the TLB entries. The paging system uses pages of size 4 KB. The virtual address space is 64 GB and physical address space is 1 GB. If each TLB entry stores a 4-bit process id, page number, frame number, and a 2-bit control field, then the size of the TLB (in bytes) is ___________. (answer in integer)

Note: $1\text{K}=2^{10}, 1\text{M}=2^{20}, 1\text{G}=2^{30}$

Your answer

Official answer and solution

Official answer: 1536
From: Official GATE 2026 answer key

Solution

Find the number of TLB entries from TLB reach / page size, then compute the bit width of each TLB entry.

Number of TLB entries:

\text{Entries} = \frac{\text{TLB Reach}}{\text{Page Size}} = \frac{1\text{ MB}}{4\text{ KB}} = \frac{2^{20}}{2^{12}} = 2^8 = 256 \text{ entries}

Fields in each TLB entry (with page size $= 4\text{ KB} = 2^{12}$ $= 4 KB = 2^{12}$ bytes):
- Process ID $= 4$ bits
- Virtual Page Number (VPN) $= \log_2(64\text{ GB} / 4\text{ KB}) = 36 - 12 = 24$ bits
- Physical Frame Number (PFN) $= \log_2(1\text{ GB} / 4\text{ KB}) = 30 - 12 = 18$ bits
- Control field $= 2$ bits
- Total bits per entry $= 4 + 24 + 18 + 2 = 48\text{ bits} = 6\text{ bytes}$ .
Total TLB size:

256 \times 6\text{ bytes} = 1536\text{ bytes}

Final answer

1536

The answer is the one in the official GATE answer key. The solution is this site's own explanation.

Source

Paper: GATE 2026 Computer Science and Information Technology - Session 2 (CS2)
Question: 54 of 65
Section: Computer Science and Information Technology

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