Linked answer questions
Statement for Linked Answer Questions 52 and 53:
A computer uses 46-bit virtual address, 32-bit physical address, and a three-level paged page table organization. The page table base register stores the base address of the first-level table (T1), which occupies exactly one page. Each entry of T1 stores the base address of a page of the second-level table (T2). Each entry of T2 stores the base address of a page of the third-level table (T3). Each entry of T3 stores a page table entry (PTE). The PTE is 32 bits in size. The processor used in the computer has a 1 MB 16-way set associative virtually indexed physically tagged cache. The cache block size is 64 bytes.
Shared with question 53.
Question
What is the size of a page in KB in this computer?
Official answer and solution
- Official answer
- C
- From
- Official GATE 2013 answer key
Solution
Set up the equation for the virtual address breakdown in a 3-level paged page table where each level occupies a page.
Let the page size be bytes, so the page offset is bits.
-
Virtual address format:
- Total virtual address size = 46 bits.
- Page offset = bits.
- Virtual page number = bits.
-
Page table entry size and index size:
- Each page table entry (PTE) is 32 bits bytes bytes.
- Since each table at each level () occupies exactly one page of size bytes, the number of entries per page table is:
- Therefore, each indexing level requires bits.
-
Relating virtual address bits:
The 3 levels of page tables consume bits for the virtual page number: -
Calculate page size:
Thus, the page size is 8 KB, which matches option (C).
C
The answer is the one in the official GATE answer key. The solution is this site's own explanation.
Source
- Paper
- GATE 2013 Computer Science and Information Technology (CS)
- Question
- 52 of 65, printed as CS Q.52
- Section
- Computer Science and Information Technology
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